/*
---------------------------------------------------------------------
                80C188EB PORT DEFINITIONS
---------------------------------------------------------------------
*/
#define PCB          0x0FF00        /*  default base address after reset */

/* interrupt controller registers */
#define EOI          PCB+0x002
#define POLL         PCB+0x004
#define POLLSTS      PCB+0x006
#define IMASK        PCB+0x008
#define PRIMSK       PCB+0x00A
#define INSERV       PCB+0x00C
#define REQST        PCB+0x00E
#define INTSTS       PCB+0x000
#define TCUCON       PCB+0x012
#define SCUCON       PCB+0x014
#define I4CON        PCB+0x016
#define I0CON        PCB+0x018
#define I1CON        PCB+0x01A
#define I2CON        PCB+0x01C
#define I3CON        PCB+0x01E

 /* timer registers */
#define T0CNT        PCB+0x030
#define T0CMPA       PCB+0x032
#define T0CMPB       PCB+0x034
#define T0CON        PCB+0x036
#define T1CNT        PCB+0x038
#define T1CMPA       PCB+0x03A
#define T1CMPB       PCB+0x03C
#define T1CON        PCB+0x03E
#define T2CNT        PCB+0x040
#define T2CMPA       PCB+0x042
#define T2CON        PCB+0x046

/* input/output port unit registers */
#define P1DIR        PCB+0x050
#define P1PIN        PCB+0x052
#define P1CON        PCB+0x054
#define P1LTCH       PCB+0x056
#define P2DIR        PCB+0x058
#define P2PIN        PCB+0x05A
#define P2CON        PCB+0x05C
#define P2LTCH       PCB+0x05E

 /* serial port registers */
#define B0CMP        PCB+0x060
#define B0CNT        PCB+0x062
#define S0CON        PCB+0x064
#define S0STS        PCB+0x066
#define S0RBUF       PCB+0x068
#define S0TBUF       PCB+0x06A
#define B1CMP        PCB+0x070
#define B1CNT        PCB+0x072
#define S1CON        PCB+0x074
#define S1STS        PCB+0x076
#define S1RBUF       PCB+0x078
#define S1TBUF       PCB+0x07A
	/* SnSTS bits */
	#define SS_CTS       0x002
	#define SS_TXE       0x008
	#define SS_TIN       0x020
	#define SS_RIN       0x040

	/* S0CON bits */
	#define SC_DFLT      0x021   /* Mode 1; no parity, no RX enable, no CTS */
	#define SC_REN       0x020   /* RX enable bit */

	/* BnCMP values, need bit 15 set before being written in order
	   to use the CPU clock as the timebase */
	/* BnCMP = (Fcpu / (baudrate * 8)) - 1   */
	#define B110_12      13635       /*  values for 12MHz clock */
	#define B150_12      9999
	#define B300_12      4999
	#define B600_12      2499
	#define B1200_12     1249
	#define B2400_12     624
	#define B4800_12     312
	#define B9600_12     155
	#define B19200_12    77
	#define B38400_12    38
	#define B57600_12    25
	#define B115200_12   12

	#define B110_20      22726       /* values for 20MHz clock */
	#define B150_20      16666
	#define B300_20      8332
	#define B600_20      4166
	#define B1200_20     2082
	#define B2400_20     1041
	#define B4800_20     520
	#define B9600_20     259
	#define B19200_20    129
	#define B38400_20    64
	#define B57600_20    42
	#define B115200_20   21

	#define B110_25      28408       /* values for 25MHz clock */
	#define B150_25      20832
	#define B300_25      10416
	#define B600_25      5207
	#define B1200_25     2603
	#define B2400_25     1301
	#define B4800_25     650
	#define B9600_25     325
	#define B19200_25    162
	#define B38400_25    80
	#define B57600_25    53
	#define B115200_25   26


 /* chip select control registers */
#define GCS0ST       PCB+0x080         /* JEDEC socket */
#define GCS0SP       PCB+0x082
#define GCS1ST       PCB+0x084        /* onboard I/O */
#define GCS1SP       PCB+0x086
#define GCS2ST       PCB+0x088        /* P1.2 available */
#define GCS2SP       PCB+0x08A
#define GCS3ST       PCB+0x08C        /* P1.3 used for RTS0 line */
#define GCS3SP       PCB+0x08E
#define GCS4ST       PCB+0x090        /* P1.4 used for RTS1 line */
#define GCS4SP       PCB+0x092
#define GCS5ST       PCB+0x094        /* PC/104 memory / P1.5 used for Vpp enable */
#define GCS5SP       PCB+0x096
#define GCS6ST       PCB+0x098        /* PC/104 I/O / P1.6 used for LED */
#define GCS6SP       PCB+0x09A
#define GCS7ST       PCB+0x09C        /* P1.7 used for real-time clock reset */
#define GCS7SP       PCB+0x09E
#define LCSST        PCB+0x0A0        /*  RAM  */
#define LCSSP        PCB+0x0A2
#define UCSST        PCB+0x0A4        /*  flash */
#define UCSSP        PCB+0x0A6

/* PCB relocation register */
#define RELREG       PCB+0x0A8

/* refresh control unit registers */
#define RFBASE       PCB+0x0B0
#define RFTIME       PCB+0x0B2
#define RFCON        PCB+0x0B4
#define RFADDR       PCB+0x0B6

/* power management unit register */
#define PWRCON       PCB+0x0B8

/*
---------------------------------------------------------------------
		 82C55 PORT EQUATES
---------------------------------------------------------------------
*/
#define DIOBASE      0xFE40
#define DPORT0       DIOBASE+0
#define DPORT1       DIOBASE+1
#define DPORT2       DIOBASE+2
#define DCMDR        DIOBASE+3       /* write only */

/*
---------------------------------------------------------------------
	       WATCHDOG TIMER PORT
---------------------------------------------------------------------
*/
#define WDTMR        0xFE4C          /* write only */

/*
---------------------------------------------------------------------
	       ALTERNATE MEMORY MAP PORT
---------------------------------------------------------------------
*/
#define ALTMAPPORT           0xFE48          /* write only */

/*
---------------------------------------------------------------------
	       ANALOG TO DIGITAL CONVERTER
---------------------------------------------------------------------
*/
#define ADCTRL               0xFE44          /* write only */
#define ADDATA               0xFE44          /* read only  */
#define ADDATALO             0xFE44          /* read only  */
#define ADDATAHI             0xFE45          /* read only  */